ICT 307

Computer Organization and Architecture

Basic structure of computers; performance evaluation: metrics and calculations, performance equations, Amdahl’s law; instruction set architecture; introduction to computer arithmetic; CPU design and architecture; pipelining and instruction level parallelism; the memory subsystems – memory hierarchy, caches and cache hierarchies, cache organisations, cache performance, compiler support for cache performance, main memory organisation, virtual memory, TLBs. Input and output organisations.

Course Code
ICT 307
Department
ICT Programme
Campus
Sumas University
Level
300 Level, Undergraduate
Instructor
Sumas University Lecturer
Semester
First Semester
Credit
2 Units
Method
Lecture